It wouldn't help. The PMIC generates several more rails below 3V3, and they are all brought up in sequence at power-on, which is important to prevent damage to the SOC.On a side note, if the PMIC is toasted, I wonder what would happen if I supplied 3.3v, 5v and Gnd through the GPIO?
Statistics: Posted by davidcoton — Fri Aug 02, 2024 12:56 pm